HD6473847RHV Datasheet, PDF (394/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 16 List of Registers
16.1 Register Addresses (Address Order)
The data bus width indicates the numbers of bits by which the register is accessed.
The number of access states indicates the number of states based on the specified reference clock.
Register Name
Abbre-
viation
Module
Bit No Address Name
Flash memory control register 1 FLMCR1 8
H'F020 ROM
Flash memory control register 2 FLMCR2 8
H'F021 ROM
Flash memory power control
register
FLPWCR 8
H'F022 ROM
Erase block register
EBR
8
H'F023 ROM
Flash memory enable register FENR
8
H'F02B ROM
Low-voltage detection control
register^*4
LVDCR 8
H'FF86 LVD
Low-voltage detection status
register^*4
LVDSR 8
Event counter PWM compare
register H
ECPWCRH 8
Event counter PWM compare
register L
ECPWCRL 8
Event counter PWM data register ECPWDRH 8
H
Event counter PWM data register ECPWDRL 8
L
H'FF87 LVD
H'FF8C AEC^*1
H'FF8D AEC^*1
H'FF8E AEC^*1
H'FF8F AEC^*1
Wakeup edge select register
WEGR 8
H'FF90 Interrupts
Serial port control register
Input pin edge select register
Event counter control register
Event counter control/status
register
Event counter H
Event counter L
SPCR
8
AEGSR 8
ECCR
8
ECCSR 8
ECH
8
ECL
8
H'FF91
H'FF92
H'FF94
H'FF95
SCI3
AEC^*1
AEC^*1
AEC^*1
H'FF96 AEC^*1
H'FF97 AEC^*1
Serial mode register
SMR
8
H'FFA8 SCI3
Bit rate register
BRR
8
H'FFA9 SCI3
Serial control register 3
SCR3
8
H'FFAA SCI3
Data Bus Access
Width State
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
3
8
3
8
3
Rev. 7.00 Mar. 08, 2010 Page 362 of 510
REJ09B0024-0700