HD6473847RHV Datasheet, PDF (121/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

3.5 Usage Notes
Section 3 Exception Handling
3.5.1 Interrupts after Reset
If an interrupt is accepted after a reset and before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests
are disabled immediately after a reset. Since the first instruction of a program is always executed
immediately after the reset state ends, make sure that this instruction initializes the stack pointer
(example: MOV.W #xx: 16, SP).
3.5.2 Notes on Stack Area Use
When word data is accessed, the least significant bit of the address is regarded as 0. Access to the
stack always takes place in word size, so the stack pointer (SP: R7) should never indicate an odd
address. Use PUSH Rn (MOV.W Rn, @–SP) or POP Rn (MOV.W @SP+, Rn) to save or restore
register values.
3.5.3 Interrupt Request Flag Clearing Method
Use the following recommended method for flag clearing in the interrupt request registers (IRR1,
IRR2, and IWPR).
Recommended Method: Perform flag clearing with only one instruction. Either a bit
manipulation instruction or a data transfer instruction in bytes can be used. Two examples of
coding for clearing IRRI1 (bit 1 in IRR1) are shown below:
• BCR #1,@IRR1:8
• MOV.B R1L,@IRR1:8 (Set B′11111101 to R1L in advance)
Malfunction Example: When flag clearing is performed with several instructions, a flag, other
than the intended one, which was set while executing one of those instructions may be accidentally
cleared, and thus cause incorrect operations to occur.
An example of coding for clearing IRRI1 (bit 1 in IRR1), in which IRRI0 is also cleared and the
interrupt becomes invalid is shown below.
MOV.B @IRR1:8,R1L
At this point, IRRI0 is 0.
AND.B
#B′11111101,R1L IRRI0 becomes 1 here.
MOV.B R1L,@IRR1:8
IRRI0 is cleared to 0.
Rev. 7.00 Mar. 08, 2010 Page 89 of 510
REJ09B0024-0700