HD6473847RHV Datasheet, PDF (356/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 12 A/D Converter
12.7.3 Additional Usage Notes
1. ADRRH and ADRRL should be read only when the ADSF bit in ADSR is cleared to 0.
2. Changing the digital input signal at an adjacent pin during A/D conversion may adversely
affect conversion accuracy.
3. When A/D conversion is started after clearing module standby mode, wait for 10φ clock
cycles before starting A/D conversion.
4. In active mode and sleep mode, the analog power supply current flows in the ladder resistance
even when the A/D converter is on standby. Therefore, if the A/D converter is not used, it is
recommended that AVcc be connected to the system power supply and the ADCKSTP bit be
cleared to 0 in CKSTPR1.
Rev. 7.00 Mar. 08, 2010 Page 324 of 510
REJ09B0024-0700