HD6473847RHV Datasheet, PDF (199/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

A15 to A0
Command write
t_ces
t_ceh
t_nxtc
Section 6 ROM
Memory read mode
Address stable
I/O7 to I/O0
t_wep
tf
tr
t_ds
t_dh
Note: Data is latched on the rising edge of .
Figure 6.13 Timing Waveforms for Memory Read after Command Write
Table 6.13 AC Characteristics in Transition from Memory Read Mode to Another Mode
(Conditions: V_CC = 3.3 V ±0.3 V, V_SS = 0 V, Ta = 25°C ±5°C)
Item
Command write cycle
CE hold time
CE setup time
Data hold time
Data setup time
Write pulse width
WE rise time
WE fall time
Symbol
t_nxtc
t
ceh
t_ces
t_dh
t_ds
t_wep
t
r
t
f
Min
20
0
0
50
50
70
—
—
Max
—
—
—
—
—
—
30
30
Unit
µs
ns
ns
ns
ns
ns
ns
ns
Test Condition
Figure 6.14
Rev. 7.00 Mar. 08, 2010 Page 167 of 510
REJ09B0024-0700