HD6473847RHV Datasheet, PDF (333/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 10 Serial Communication Interface 3 (SCI3)
16 clocks
8 clocks
0
7
15 0
7
15 0
Internal basic
clock
Receive data
(RXD32)
Synchronization
sampling timing
Start bit
D0
D1
Data sampling
timing
Figure 10.16 Receive Data Sampling Timing in Asynchronous Mode
10.7.5 Note on Switching SCK32 Function
If pin SCK32 is used as a clock output pin by the SCI3 in clocked synchronous mode and is then
switched to a general input/output pin (a pin with a different function), the pin outputs a low level
signal for half a system clock (φ) cycle immediately after it is switched.
This can be prevented by either of the following methods according to the situation.
a. When an SCK32 function is switched from clock output to non clock-output
When stopping data transfer, issue one instruction to clear bits TE and RE to 0 and to set bits
CKE1 and CKE0 in SCR3 to 1 and 0, respectively.
In this case, bit COM in SMR should be left 1. The above prevents SCK32 from being used as
a general input/output pin. To avoid an intermediate level of voltage from being applied to
SCK32, the line connected to SCK32 should be pulled up to the V_CC level via a resistor, or
supplied with output from an external device.
b. When an SCK32 function is switched from clock output to general input/output
When stopping data transfer,
(i) Issue one instruction to clear bits TE and RE to 0 and to set bits CKE1 and CKE0 in
SCR3 to 1 and 0, respectively.
(ii) Clear bit COM in SMR to 0
(iii) Clear bits CKE1 and CKE0 in SCR3 to 0
Note that special care is also needed here to avoid an intermediate level of voltage from being
applied to SCK32.
Rev. 7.00 Mar. 08, 2010 Page 301 of 510
REJ09B0024-0700