HD6473847RHV Datasheet, PDF (82/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Section 2 CPU
Figure 2.9 shows the instruction formats of branch instructions.
15
op
87
0
cc
disp
Bcc
15
87
0
op
rm
0 0 0 0 JMP (@Rm)
15
87
op
abs
0
JMP (@aa:16)
15
87
0
op
abs
JMP (@@aa:8)
15
87
0
op
disp
BSR
15
87
0
op
rm
0 0 0 0 JSR (@Rm)
15
87
op
abs
0
JSR (@aa:16)
15
87
0
op
abs
JSR (@@aa:8)
15
87
op
0
RTS
Legend:
op: Operation field
cc: Condition field
rm: Register field
disp: Displacement
abs: Absolute address
Figure 2.9 Instruction Formats of Branch Instructions
Rev. 7.00 Mar. 08, 2010 Page 50 of 510
REJ09B0024-0700