EP2S90F1020C5 Datasheet, PDF (682/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Dedicated Remote System Upgrade Circuitry
Table 8–8. Interface Signals between Remote System Upgrade Circuitry and FPGA Logic Array (Part 2
of 3)
Signal Name
RU_CLK
RU_SHIFTnLD
Signal Direction
Description
Input to remote system
upgrade block (driven by
FPGA logic array)
Input to remote system
upgrade block (driven by
FPGA logic array)
Clocks the remote system upgrade shift register and update
register so that the contents of the status, control, and update
registers can be read, and so that the contents of the update
register can be loaded. The shift register latches data on the
rising edge of this clock signal.
This pin determines if the shift register contents are shifted
over during the next clock edge or loaded in/out.
When this signal is driven high (1'b1), the remote system
upgrade shift register shifts data left on each rising edge of
RU_CLK.
When RU_SHIFTnLD is driven low (1'b0) and
RU_CAPTnUPDT is driven low (1'b0), the remote system
upgrade update register is updated with the contents of the
shift register on the rising edge of RU_CLK.
RU_CAPTnUPDT
Input to remote system
upgrade block (driven by
FPGA logic array)
When RU_SHIFTnLD is driven low (1'b0) and
RU_CAPTnUPDT is driven high (1'b1), the remote system
upgrade shift register captures the status register and either
the control or update register (depending on whether the
current configuration is application or factory, respectively) on
the rising edge of RU_CLK.
This pin determines if the contents of the shift register are
captured or updated on the next clock edge.
When the RU_SHIFTnLD signal is driven high (1'b1), this
input signal has no function.
When RU_SHIFTnLD is driven low (1'b0) and
RU_CAPTnUPDT is driven high (1'b1), the remote system
upgrade shift register captures the status register and either
the control or update register (depending on whether the
current configuration is application or factory, respectively) on
the rising edge of RU_CLK.
When RU_SHIFTnLD is driven low (1'b0) and
RU_CAPTnUPDT is driven low (1'b0), the remote system
upgrade update register is updated with the contents of the
shift register on the rising edge of RU_CLK.
In local update mode, a low input on RU_CAPTnUPDT has no
function, because the update register cannot be updated in
this mode.
8–22
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008