EP2S90F1020C5 Datasheet, PDF (216/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Timing Model
Table 5–78. Maximum Output Toggle Rate on Stratix II Devices (Part 2 of 5) Note (1)
I/O Standard
Drive
Strength
SSTL-18 Class I
SSTL-18 Class II
1.8-V HSTL
Class I
1.8-V HSTL
Class II
1.5-V HSTL
Class I
1.5-V HSTL
Class II
Differential
SSTL-2 Class I (3)
Differential
SSTL-2 Class II
(3)
4 mA
6 mA
8 mA
10 mA
12 mA
8 mA
16 mA
18 mA
20 mA
4 mA
6 mA
8 mA
10 mA
12 mA
16 mA
18 mA
20 mA
4 mA
6 mA
8 mA
10 mA
12 mA
16 mA
18 mA
20 mA
8 mA
12 mA
16 mA
20 mA
24 mA
Column I/O Pins (MHz)
-3
-4
-5
200
150
150
350
250
200
450
300
300
500
400
400
700
550
400
200
200
150
400
350
350
450
400
400
550
500
450
300
300
300
500
450
450
650
600
600
700
650
600
700
700
650
500
500
450
550
500
500
650
550
550
350
300
300
500
500
450
700
650
600
700
700
650
700
700
700
600
600
550
650
600
600
700
650
600
400
300
300
400
400
350
350
350
300
400
350
350
400
400
350
Row I/O Pins (MHz) Clock Outputs (MHz)
-3
-4 -5 -3 -4 -5
200
150 150 200 150 150
350
250 200 350 250 200
450
300 300 450 300 300
500
400 400 500 400 400
-
-
- 650 550 400
-
-
- 200 200 150
-
-
- 400 350 350
-
-
- 450 400 400
-
-
- 550 500 450
300
300 300 300 300 300
500
450 450 500 450 450
650
600 600 650 600 600
700
650 600 700 650 600
700
700 650 700 700 650
-
-
- 500 500 450
-
-
- 550 500 500
-
-
- 550 550 550
350
300 300 350 300 300
500
500 450 500 500 450
700
650 600 700 650 600
-
-
- 700 700 650
-
-
- 700 700 700
-
-
- 600 600 550
-
-
- 650 600 600
-
-
- 700 650 600
400
300 300 400 300 300
400
400 350 400 400 350
350
350 300 350 350 300
350
350 297 400 350 350
-
-
- 400 400 350
5–70
Stratix II Device Handbook, Volume 1
Altera Corporation
April 2011