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EP2S90F1020C5 Datasheet, PDF (3/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1 | |||
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Contents
Chapter Revision Dates .......................................................................... vii
About this Handbook ................................................................................ i
How to Contact Altera ............................................................................................................................... i
Typographic Conventions ......................................................................................................................... i
Section I. Stratix II Device Family Data Sheet
Revision History ....................................................................................................................... Section Iâ1
Chapter 1. Introduction
Introduction ............................................................................................................................................ 1â1
Features ................................................................................................................................................... 1â1
Document Revision History ................................................................................................................. 1â6
Chapter 2. Stratix II Architecture
Functional Description .......................................................................................................................... 2â1
Logic Array Blocks ................................................................................................................................ 2â3
LAB Interconnects ............................................................................................................................ 2â4
LAB Control Signals ......................................................................................................................... 2â5
Adaptive Logic Modules ...................................................................................................................... 2â6
ALM Operating Modes ................................................................................................................... 2â9
Register Chain ................................................................................................................................. 2â20
Clear & Preset Logic Control ........................................................................................................ 2â22
MultiTrack Interconnect ..................................................................................................................... 2â22
TriMatrix Memory ............................................................................................................................... 2â28
Memory Block Size ......................................................................................................................... 2â29
Digital Signal Processing Block ......................................................................................................... 2â40
Modes of Operation ....................................................................................................................... 2â44
DSP Block Interface ........................................................................................................................ 2â44
PLLs & Clock Networks ..................................................................................................................... 2â48
Global & Hierarchical Clocking ................................................................................................... 2â48
Enhanced & Fast PLLs ................................................................................................................... 2â57
Enhanced PLLs ............................................................................................................................... 2â68
Fast PLLs .......................................................................................................................................... 2â69
I/O Structure ........................................................................................................................................ 2â69
Double Data Rate I/O Pins ........................................................................................................... 2â77
External RAM Interfacing ............................................................................................................. 2â81
Programmable Drive Strength ..................................................................................................... 2â83
Altera Corporation
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