EP2S90F1020C5 Datasheet, PDF (678/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Dedicated Remote System Upgrade Circuitry
Remote System Upgrade Status Register
The remote system upgrade status register specifies the reconfiguration
trigger condition. The various trigger and error conditions include:
■ CRC (cyclic redundancy check) error during application
configuration
■ nSTATUS assertion by an external device due to an error
■ FPGA logic array triggered a reconfiguration cycle, possibly after
downloading a new application configuration image
■ External configuration reset (nCONFIG) assertion
■ User watchdog timer time out
Figure 8–8 and Table 8–5 specify the contents of the status register. The
numbers in the figure show the bit positions within a 5-bit register.
Figure 8–8. Remote System Upgrade Status Register
4
3
2
1
0
Wd nCONFIG Core_nCONFIG nSTATUS CRC
Table 8–5. Remote System Upgrade Status Register Contents
Status Register Bit
Definition
CRC (from configuration)
CRC error caused
reconfiguration
nSTATUS
CORE (1)
CORE_nCONFIG
nSTATUS caused
reconfiguration
Device logic array caused
reconfiguration
nCONFIG
Wd
nCONFIG caused
reconfiguration
Watchdog timer caused
reconfiguration
POR Reset Value
1 bit '0'
1 bit '0'
1 bit '0'
1 bit '0'
1 bit '0'
Note to Table 8–5:
(1) Logic array reconfiguration forces the system to load the application
configuration data into the Stratix II or Stratix II GX device. This occurs after the
factory configuration specifies the appropriate application configuration page
address by updating the update register.
8–18
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008