EP2S90F1020C5 Datasheet, PDF (521/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

DSP Blocks in Stratix II and Stratix II GX Devices
Table 6–4 shows the total number of multipliers available in Stratix II GX
devices using DSP blocks and soft multipliers.
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Table 6–4. Number of Multipliers in Stratix II GX Devices
Device
EP2SGX30C
EP2SGX30D
EP2SGX60C
EP2SGX60D
EP2SGX60E
EP2SGX90E
EP2SGX90F
EP2SGX130G
DSP Blocks
(18 × 18)
64
Soft Multipliers
Total
(16 × 16) (1), (2) Multipliers (3), (4)
189
253 (3.95)
144
325
469 (3.26)
192
509
701 (3.65)
252
750
1,002 (3.98)
Notes to Table 6–4:
(1) Soft multipliers implemented in sum of multiplication mode. RAM blocks are
configured with 18-bit data widths and sum of coefficients up to 18-bits.
(2) Soft multipliers are only implemented in M4K and M512 TriMatrix memory
blocks, not M-RAM blocks.
(3) The number in parentheses represents the increase factor, which is the total
number of multipliers with soft multipliers divided by the number of 18 × 18
multipliers supported by DSP blocks only.
(4) The total number of multipliers may vary according to the multiplier mode used.
Refer to the Stratix II Architecture chapter in volume 1 of the Stratix II
Device Handbook or the Stratix II GX Architecture chapter in volume 1 of
the Stratix II GX Device Handbook for more information on Stratix II or
Stratix II GX TriMatrix memory blocks. Refer to AN 306: Implementing
Multipliers in FPGA Devices for more information on soft multipliers.
Altera Corporation
January 2008
6–5
Stratix II Device Handbook, Volume 2