EP2S90F1020C5 Datasheet, PDF (603/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Configuring Stratix II and Stratix II GX Devices
Figure 7–18. Multi-Device PS Configuration Using an External Host
Memory
ADDR
DATA0
V_CC (1) V_CC (1)
10 k Ω 10 k Ω
Stratix II or Stratix II GX
Device 1
External Host
(MAX II Device or
Microprocessor)
GND
CONF_DONE
nSTATUS
nCE
nCEO
MSEL3
DATA0
nCONFIG
DCLK
MSEL2
MSEL1
MSEL0
V_CC
GND
Stratix II or Stratix II GX
Device 2
CONF_DONE
nSTATUS
nCEO
nCE
MSEL3
DATA0
nCONFIG
DCLK
MSEL2
MSEL1
MSEL0
N.C.
V_CC
GND
Note to Figure 7–18:
(1) The pull-up resistor should be connected to a supply that provides an acceptable input signal for all devices in the
chain. V_CC should be high enough to meet the V_IH specification of the I/O on the device and the external host.
In multi-device PS configuration the first device’s nCE pin is connected to
GND while its nCEO pin is connected to nCE of the next device in the
chain. The last device's nCE input comes from the previous device, while
its nCEO pin is left floating. After the first device completes configuration
in a multi-device configuration chain, its nCEO pin drives low to activate
the second device's nCE pin, which prompts the second device to begin
configuration. The second device in the chain begins configuration within
one clock cycle. Therefore, the transfer of data destinations is transparent
to the MAX II device. All other configuration pins (nCONFIG, nSTATUS,
DCLK, DATA0, and CONF_DONE) are connected to every device in the
chain. Configuration signals can require buffering to ensure signal
integrity and prevent clock skew problems. Ensure that the DCLK and
DATA lines are buffered for every fourth device. Because all device
CONF_DONE pins are tied together, all devices initialize and enter user
mode at the same time.
Since all nSTATUS and CONF_DONE pins are tied together, if any device
detects an error, configuration stops for the entire chain and the entire
chain must be reconfigured. For example, if the first device flags an error
on nSTATUS, it resets the chain by pulling its nSTATUS pin low. This
behavior is similar to a single device detecting an error.
Altera Corporation
January 2008
7–51
Stratix II Device Handbook, Volume 2