EP2S90F1020C5 Datasheet, PDF (581/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Configuring Stratix II and Stratix II GX Devices
When nSTATUS is pulled high, the configuration device’s OE pin also
goes high and the configuration device clocks data out to the device using
the Stratix II or Stratix II GX device’s internal oscillator. The Stratix II and
Stratix II GX devices receive configuration data on the DATA[7..0] pins
and the clock is received on the DCLK pin. A byte of data is latched into
the device on each rising edge of DCLK.
After the device has received all configuration data successfully, it
releases the open-drain CONF_DONE pin which is pulled high by a pull-up
resistor. Because CONF_DONE is tied to the configuration device’s nCS pin,
the configuration device is disabled when CONF_DONE goes high.
Enhanced configuration devices have an optional internal pull-up
resistor on the nCS pin. This option is available in the Quartus II software
from the General tab of the Device & Pin Options dialog box. If this
internal pull-up resistor is not used, an external 10-k pull-up resistor on
the nCS-CONF_DONE line is required. A low to high transition on
CONF_DONE indicates configuration is complete and initialization of the
device can begin.
In Stratix II and Stratix II GX devices, the initialization clock source is
either the internal oscillator (typically 10 MHz) or the optional CLKUSR
pin. By default, the internal oscillator is the clock source for initialization.
If the internal oscillator is used, the Stratix II or Stratix II GX device
provides itself with enough clock cycles for proper initialization. You also
have the flexibility to synchronize initialization of multiple devices or to
delay initialization with the CLKUSR option. The Enable user-supplied
start-up clock (CLKUSR) option can be turned on in the Quartus II
software from the General tab of the Device & Pin Options dialog box.
Supplying a clock on CLKUSR will not affect the configuration process.
After all configuration data has been accepted and CONF_DONE goes high,
CLKUSR will be enabled after the time specified as t_CD2CU. After this time
period elapses, Stratix II and Stratix II GX devices require 299 clock cycles
to initialize properly and enter user mode. Stratix II and Stratix II GX
devices support a CLKUSR f_MAX of 100 MHz.
An optional INIT_DONE pin is available, which signals the end of
initialization and the start of user-mode with a low-to-high transition.
The Enable INIT_DONE Output option is available in the Quartus II
software from the General tab of the Device & Pin Options dialog box.
If the INIT_DONE pin is used, it will be high due to an external 10-k
pull-up resistor when nCONFIG is low and during the beginning of
configuration. Once the option bit to enable INIT_DONE is programmed
into the device (during the first frame of configuration data), the
INIT_DONE pin will go low. When initialization is complete, the
INIT_DONE pin will be released and pulled high. In user-mode, the user
Altera Corporation
January 2008
7–29
Stratix II Device Handbook, Volume 2