EP2S90F1020C5 Datasheet, PDF (608/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Passive Serial Configuration
Figure 7–21. Single Device PS Configuration Using an Enhanced Configuration Device
VCC (1)
Stratix II Device
10 kΩ (3)
VCC (1)
10 kΩ (3)
Enhanced
Configuration
Device
V_CC
MSEL3
MSEL2
DCLK
DATA0
nSTATUS
CONF_DONE
nCONFIG
DCLK
DATA
OE (3)
nCS (3)
nINIT_CONF (2)
MSEL1
nCEO N.C.
MSEL0
nCE
GND
GND
Notes to Figure 7–21:
(1) The pull-up resistor should be connected to the same supply voltage as the configuration device.
(2) The nINIT_CONF pin is available on enhanced configuration devices and has an internal pull-up resistor that is
always active, meaning an external pull-up resistor should not be used on the nINIT_CONF-nCONFIG line. The
nINIT_CONF pin does not need to be connected if its functionality is not used. If nINIT_CONF is not used, nCONFIG
must be pulled to V_CC either directly or through a resistor.
(3) The enhanced configuration devices’ OE and nCS pins have internal programmable pull-up resistors. If internal
pull-up resistors are used, external pull-up resistors should not be used on these pins. The internal pull-up resistors
are used by default in the Quartus II software. To turn off the internal pull-up resistors, check the Disable nCS and
OE pull-ups on configuration device option when generating programming files.
f
The value of the internal pull-up resistors on the enhanced configuration
devices can be found in the Operating Conditions table of the Enhanced
Configuration Devices (EPC4, EPC8, & EPC16) Data Sheet chapter in
volume 2 of the Configuration Handbook or the Configuration Devices for
SRAM-based LUT Devices Data Sheet chapter in volume 2 of the
Configuration Handbook.
When using enhanced configuration devices, nCONFIG of the device can
be connected to nINIT_CONF of the configuration device, which allows
the INIT_CONF JTAG instruction to initiate device configuration. The
nINIT_CONF pin does not need to be connected if its functionality is not
used. An internal pull-up resistor on the nINIT_CONF pin is always
active in enhanced configuration devices, which means an external
pull-up resistor should not be used if nCONFIG is tied to nINIT_CONF.
Upon power-up, the Stratix II and Stratix II GX devices go through a
POR. The POR delay is dependent on the PORSEL pin setting. When
PORSEL is driven low, the POR time is approximately 100 ms. If PORSEL
is driven high, the POR time is approximately 12 ms. During POR, the
device will reset, hold nSTATUS low, and tri-state all user I/O pins. The
configuration device also goes through a POR delay to allow the power
supply to stabilize. The POR time for EPC2 devices is 200 ms (maximum).
The POR time for enhanced configuration devices can be set to either
7–56
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008