EP2S90F1020C5 Datasheet, PDF (509/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

High-Speed Differential I/O Interfaces with DPA in Stratix II and Stratix II GX Devices
Using Both Center Fast PLLs
■ Both center fast PLLs can be used for DPA as long as they drive DPA
channels in their adjacent quadrant only. See Figure 5–23.
■ Both center fast PLLs cannot be used for DPA if one of the fast PLLs
drives the top and bottom banks, or if they are driving cross banks
(e.g., the lower fast PLL drives the top bank and the top fast PLL
drives the lower bank).
Figure 5–23. Center Fast PLL Usage When Driving DPA Channels
DPA
DPA
DPA
DPA
DPA
Ref CLK
Fast PLL
Fast PLL
Ref CLK
DPA
DPA
DPA
DPA
Channels Driven by
the Upper Center PLL
Ref Clk
Center PLL
Driving Top Bank
Center PLL
Driving Lower Bank
Ref Clk
Channels Driven by
the Lower Center PLL
DPA
Altera Corporation
January 2008
5–25
Stratix II Device Handbook, Volume 2