EP2S90F1020C5 Datasheet, PDF (577/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Configuring Stratix II and Stratix II GX Devices
Table 7–10 defines the timing parameters for Stratix II and Stratix II GX
devices for FPP configuration when the decompression and/or the
design security feature are enabled.
Table 7–10. FPP Timing Parameters for Stratix II and Stratix II GX Devices With Decompression or Design
Security Feature Enabled Note (1)
Symbol
Parameter
Min
t_CF2CD nCONFIG low to CONF_DONE low
t_CF2ST0 nCONFIG low to nSTATUS low
t_CFG
nCONFIG low pulse width
2
t_STATUS nSTATUS low pulse width
10
t_CF2ST1 nCONFIG high to nSTATUS high
t_CF2CK nCONFIG high to first rising edge on DCLK
100
t_ST2CK nSTATUS high to first rising edge of DCLK
2
t_DSU
Data setup time before rising edge on DCLK
5
t_DH
Data hold time after rising edge on DCLK
30
t_CH
DCLK high time
4
t_CL
DCLK low time
4
t_CLK
DCLK period
10
f_MAX
DCLK frequency
t_{D ATA}
Data rate
t_R
Input rise time
t_F
Input fall time
t_CD2UM CONF_DONE high to user mode (3)
20
t_{C D2 CU} CONF_DONE high to CLKUSR enabled
4  maximum
DCLK period
t_{C D 2 U M C} CONF_DONE high to user mode with
CLKUSR option on
t_{C D 2 C U} + (299 
CLKUSR period)
Max
800
800
100 (2)
100 (2)
100
200
40
40
100
Units
ns
ns
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
MHz
Mbps
ns
ns
µs
Notes to Table 7–10:
(1) These timing parameters should be used when the decompression and design security feature are used.
(2) This value is obtainable if users do not delay configuration by extending the nCONFIG or nSTATUS low pulse
width.
(3) The minimum and maximum numbers apply only if the internal oscillator is chosen as the clock source for starting
up the device.
f
Device configuration options and how to create configuration files are
discussed further in the Software Settings chapter in the Configuration
Handbook.
Altera Corporation
January 2008
7–25
Stratix II Device Handbook, Volume 2