EP2S90F1020C5 Datasheet, PDF (479/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Selectable I/O Standards in Stratix II and Stratix II GX Devices
Table 4–10 shows the I/O standard DC current specification.
Table 4–10. Stratix II and Stratix II GX I/O Standard DC Current Specification (Part 1 of 2) Note (1)
I/O Standard
I_PIN (mA), Top and Bottom I/O Banks
LVTTL
LVCMOS
2.5 V
1.8 V
1.5 V
3.3-V PCI
3.3-V PCI-X
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.8-V HSTL Class I
1.8-V HSTL Class II
1.5-V HSTL Class I
1.5-V HSTL Class II
Differential SSTL-2 Class I
Differential SSTL-2 Class II
Differential SSTL-18 Class I
Differential SSTL-18 Class II
1.8-V differential HSTL Class I
1.8-V differential HSTL Class II
1.5-V differential HSTL Class I
1.5-V differential HSTL Class II
(3)
(3)
(3)
(3)
(3)
1.5
1.5
12 (4)
24 (4)
12 (4)
20 (4)
12 (4)
20 (4)
12 (4)
20 (4)
12
24
12
20
12
20
12
20
I_PIN (mA), Left and Right I/O
Banks(2)
(3)
(3)
(3)
(3)
(3)
NA
NA
12 (4)
16 (4)
10 (4)
NA
12
NA
8
NA
12
16
10
NA
12
NA
8
NA
Altera Corporation
January 2008
4–41
Stratix II Device Handbook, Volume 2