EP2S90F1020C5 Datasheet, PDF (535/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Altera Corporation
January 2008
DSP Blocks in Stratix II and Stratix II GX Devices
Each DSP block has two sets of accum_round and accum_saturation
signals which control if rounding or saturation is performed on the
accumulator output respectively (one set of signals for each
accumulator). Rounding and saturation of the accumulator output is only
available when implementing an 16 × 16 multiplier-accumulator to
conform to the bit widths required for Q1.15 input format computation.
A logic 1 value on the accum_round and accum_saturation signal
indicates that rounding or saturation is performed while a logic 0
indicates that no rounding or saturation is performed. A logic 1 value on
the accum_is_saturated output signal tells you that saturation has
occurred to the result of the accumulator.
Figure 6–10 shows the DSP block configured to perform multiplier-
accumulator operations.
Adder/Subtractor
The addnsub1 or addnsub3 signals specify whether you are performing
addition or subtraction. A logic 1 value on the addnsub1 or addnsub3
signals indicates that the adder/subtractor is performing addition while
a logic 0 value indicates subtraction. These signals can be dynamically
controlled using logic external to the DSP block. If the first stage is
configured as a subtractor, the output is A – B and C – D.
The adder/subtractor block share the same signa and signb signals as
the multiplier block. The signa and signb signals can be pipelined with
a latency of one or two clock cycles or not.
The DSP blocks support Q1.15 input format rounding (not saturation)
after each adder/subtractor. The addnsub1_round and
addnsub3_round signals determine if rounding is performed to the
output of the adder/subtractor.
The addnsub1_round signal controls the rounding of the top
adder/subtractor and the addnsub3_round signal controls the
rounding of the bottom adder/subtractor. Rounding of the adder output
is only available when implementing an 16 × 16 multiplier-adder to
conform to the bit widths required for Q1.15 input format computation.
A logic 1 value on the addnsub_round signal indicates that rounding is
performed while a logic 0 indicates that no rounding is performed.
Summation Block
The output of the adder/subtractor block feeds an optional summation
block, which is an adder block that sums the outputs of both
adder/subtractor blocks. The summation block is used when more than
two multiplier results are summed. This is useful in applications such as
FIR filtering.
6–19
Stratix II Device Handbook, Volume 2