EP2S90F1020C5 Datasheet, PDF (522/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

DSP Block Overview
Figure 6–2 shows the DSP block configured for 18 × 18 multiplier mode.
Figure 6–3 shows the 9 × 9 multiplier configuration of the DSP block.
Figure 6–2. DSP Block in 18 × 18 Mode
Optional Serial Shift
Register Inputs from
Previous DSP Block
From the row
interface block
Optional Serial Shift
Register Outputs to
Next DSP Block
in the Column
PRN
DQ
ENA
CLRN
PRN
DQ
ENA
CLRN
PRN
DQ
ENA
CLRN
PRN
DQ
ENA
CLRN
PRN
DQ
ENA
CLRN
PRN
DQ
ENA
CLRN
PRN
DQ
ENA
CLRN
PRN
DQ
ENA
CLRN
Multiplier Block
Adder Output Block
Q1.15
Round/
Saturate
PRN
DQ
ENA
CLRN
Optional Stage Configurable
as Accumulator or Dynamic
Adder/Subtractor
Output
Selection
Multiplexer
Adder/
Subtractor/
Accumulator
1
Q1.15
Round/
Saturate
Q1.15
Round/
Saturate
PRN
DQ
ENA
CLRN
Summation
Block
Adder
DQ
ENA
CLRN
Q1.15
Round/
Saturate
PRN
DQ
ENA
CLRN
Summation Stage
for Adding Four
Multipliers Together
Adder/
Subtractor/
Accumulator
2
Q1.15
Round/
Saturate
Q1.15
Round/
Saturate
PRN
DQ
ENA
CLRN
Optional Input Register
Stage with Parallel Input or
Shift Register Configuration
Optional Pipline
Register Stage
to MultiTrack
Interconnect
6–6
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008