EP2S90F1020C5 Datasheet, PDF (513/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

High-Speed Differential I/O Interfaces with DPA in Stratix II and Stratix II GX Devices
Referenced
Documents
This chapter references the following documents:
■ AN 224: High-Speed Board Layout Guidelines
■ DC & Switching Characteristics chapter in volume 1 of the Stratix II
Device Handbook
■ DC & Switching Characteristics chapter in volume 1 of the
Stratix II GX Device Handbook
■ PLLs in Stratix II & Stratix II GX Devices chapter in volume 2 of the
Stratix II Handbook
■ PLLs in Stratix II & Stratix II GX Devices chapter in volume 2 of the
Stratix II GX Handbook
■ Selectable I/O standards in Stratix II & Stratix II GX Devices chapter in
volume 2 of the Stratix II Device Handbook
■ Stratix II Device Family Data Sheet in volume 1 of the Stratix II Device
Handbook
Document
Table 5–5 shows the revision history for this chapter.
Revision History
Table 5–5. Document Revision History (Part 1 of 2)
Date and
Document Version
Changes Made
January 2008, v2.2 Updated Figure 5–2.
Added “Referenced Documents” section.
Minor text edits.
Added Figure 5–9.
Updated “Receiver Data Realignment Circuit”.
For the Stratix II GX Device Handbook only:
Formerly chapter 10. The chapter number changed
due to the addition of the Stratix II GX Dynamic
Reconfiguration chapter.
May 2007, v2.1
Updated entire chapter to include Stratix II GX
information.
Changed chapter part number.
Fixed two types in “High-Speed Differential I/Os
and Single-Ended I/Os” section
Summary of Changes
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Altera Corporation
January 2008
5–29
Stratix II Device Handbook, Volume 2