HD64F2357VF13 Datasheet, PDF (913/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

DMATCR—DMA Terminal Control Register H'FF01
Bit
:
7
DMATCR :
—
Initial value :
0
Read/Write :
—
6
5
4
3
—
TEE1 TEE0
—
0
0
0
0
—
R/W R/W
—
DMAC
2
1
0
—
—
—
0
0
0
—
—
—
Transfer End Enable 0
0 TEND0 pin output disabled
1 TEND0 pin output enabled
Transfer End Enable 1
0 TEND1 pin output disabled
1 TEND1 pin output enabled
DMACR0A—DMA Control Register 0A
DMACR0B—DMA Control Register 0B
DMACR1A—DMA Control Register 1A
DMACR1B—DMA Control Register 1B
H'FF02
H'FF03
H'FF04
H'FF05
DMAC
DMAC
DMAC
DMAC
Full address mode
Bit
: 15
14
13
12
11
10
DMACRA : DTSZ SAID SAIDE BLKDIR BLKE
—
Initial value :
0
0
0
0
0
0
Read/Write : R/W
R/W
R/W
R/W
R/W
R/W
9
8
—
—
0
0
R/W R/W
Reserved
Only 0 should be written to this bit.
Block Direction/Block Enable
0 0 Transfer in normal mode
1 Transfer in block transfer mode, destination side is block area
1 0 Transfer in normal mode
1 Transfer in block transfer mode, source side is block area
Source Address Increment/Decrement
0 0 MARA is fixed
1 MARA is incremented after a data transfer
10
1
Data Transfer Size
MARA is fixed
MARA is decremented after a data transfer
0 Byte-size transfer
1 Word-size transfer
Rev.6.00 Oct.28.2004 page 883 of 1016
REJ09B0138-0600H