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HD64F2357VF13 Datasheet, PDF (747/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
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tBRQOD
tBRQOD
BREQO
Figure 22-49 External Bus Request Output Timing
(4) DMAC Timing
Table 22-17 lists the DMAC timing.
Table 22-17 DMAC Timing
Conditions:
VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, Vref = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 10 to 20 MHz, Ta = –20 to +75°C (regular specifications),
Ta = –40 to +85°C (wide-range specifications)
Item
DREQ setup time
DREQ hold time
TEND delay time
DACK delay time 1
DACK delay time 2
Symbol
t DRQS
t DRQH
t TED
t DACD1
t DACD2
Condition
Min
Max
30
—
10
—
—
20
—
20
—
20
Unit
ns
ns
Test
Conditions
Figure 22-53
Figure 22-52
Figure 22-50,
Figure 22-51
Rev.6.00 Oct.28.2004 page 717 of 1016
REJ09B0138-0600H