HD64F2357VF13 Datasheet, PDF (282/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

8.3.3 DTC Vector Table
Figure 8-4 shows the correspondence between DTC vector addresses and register information.
Table 8-4 shows the correspondence between activation, vector addresses, and DTCER bits. When the DTC is activated
by software, the vector address is obtained from: H'0400 + (DTVECR[6:0] << 1) (where << 1 indicates a 1-bit left shift).
For example, if DTVECR is H'10, the vector address is H'0420.
The DTC reads the start address of the register information from the vector address set for each activation source, and then
reads the register information from that start address. The register information can be placed at predetermined addresses
in the on-chip RAM. The start address of the register information should be an integral multiple of four.
The configuration of the vector address is the same in both normal and advanced modes, a 2-byte unit being used in both
cases. These two bytes specify the lower bits of the address in the on-chip RAM.
Rev.6.00 Oct.28.2004 page 252 of 1016
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