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HD64F2357VF13 Datasheet, PDF (66/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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Table 2-3 Instructions Classified by Function
Type
Instruction
Data transfer MOV
MOVFPE
MOVTPE
POP
PUSH
LDM
STM
Arithmetic
operations
ADD
SUB
ADDX
SUBX
INC
DEC
ADDS
SUBS
DAA
DAS
MULXU
MULXS
Size*1
B/W/L
B
B
W/L
W/L
L
L
B/W/L
B
B/W/L
L
B
B/W
B/W
Function
(EAs) â Rd, Rs â (Ead)
Moves data between two general registers or between a
general register and memory, or moves immediate data
to a general register.
Cannot be used in the H8S/2357 Group.
Cannot be used in the H8S/2357 Group.
@SP+ â Rn
Pops a register from the stack. POP.W Rn is identical to
MOV.W @SP+, Rn. POP.L ERn is identical to MOV.L
@SP+, ERn.
Rn â @âSP
Pushes a register onto the stack. PUSH.W Rn is
identical to MOV.W Rn, @âSP. PUSH.L ERn is identical
to MOV.L ERn, @âSP.
@SP+ â Rn (register list)
Pops two or more general registers from the stack.
Rn (register list) â @âSP
Pushes two or more general registers onto the stack.
Rd ± Rs â Rd, Rd ± #IMM â Rd
Performs addition or subtraction on data in two general
registers, or on immediate data and data in a general
register. (Immediate byte data cannot be subtracted from
byte data in a general register. Use the SUBX or ADD
instruction.)
Rd ± Rs ± C â Rd, Rd ± #IMM ± C â Rd
Performs addition or subtraction with carry or borrow on
byte data in two general registers, or on immediate data
and data in a general register.
Rd ± 1 â Rd, Rd ± 2 â Rd
Increments or decrements a general register by 1 or 2.
(Byte operands can be incremented or decremented by
1 only.)
Rd ± 1 â Rd, Rd ± 2 â Rd, Rd ± 4 â Rd
Adds or subtracts the value 1, 2, or 4 to or from data in a
32-bit register.
Rd decimal adjust â Rd
Decimal-adjusts an addition or subtraction result in a
general register by referring to the CCR to produce 4-bit
BCD data.
Rd à Rs â Rd
Performs unsigned multiplication on data in two general
registers: either 8 bits à 8 bits â 16 bits or 16 bits Ã
16 bits â 32 bits.
Rd à Rs â Rd
Performs signed multiplication on data in two general
registers: either 8 bits à 8 bits â 16 bits or 16 bits Ã
16 bits â 32 bits.
Rev.6.00 Oct.28.2004 page 36 of 1016
REJ09B0138-0600H
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