HD64F2357VF13 Datasheet, PDF (550/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

15.2 Register Descriptions
Registers added with the Smart Card interface and bits for which the function changes are described here.
15.2.1 Smart Card Mode Register (SCMR)
Bit
:
7
6
5
4
3
2
1
0
—
—
—
—
SDIR SINV
—
SMIF
Initial value :
1
1
1
1
0
0
1
0
R/W
:—
—
—
—
R/W
R/W
—
R/W
SCMR is an 8-bit readable/writable register that selects the Smart Card interface function.
SCMR is initialized to H'F2 by a reset, and in standby mode or module stop mode.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—Smart Card Data Transfer Direction (SDIR): Selects the serial/parallel conversion format.
Bit 3
SDIR
0
1
Description
TDR contents are transmitted LSB-first
Receive data is stored in RDR LSB-first
TDR contents are transmitted MSB-first
Receive data is stored in RDR MSB-first
(Initial value)
Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. This function is used together with
the SDIR bit for communication with an inverse convention card. The SINV bit does not affect the logic level of the parity
bit. For parity-related setting procedures, see section 15.3.4, Register Settings.
Bit 2
SINV
0
1
Description
TDR contents are transmitted as they are
Receive data is stored as it is in RDR
TDR contents are inverted before being transmitted
Receive data is stored in inverted form in RDR
(Initial value)
Bit 1—Reserved: This bit cannot be modified and is always read as 1.
Bit 0—Smart Card Interface Mode Select (SMIF): Enables or disables the Smart Card interface function.
Bit 0
SMIF
0
1
Description
Smart Card interface function is disabled
Smart Card interface function is enabled
(Initial value)
Rev.6.00 Oct.28.2004 page 520 of 1016
REJ09B0138-0600H