HD64F2357VF13 Datasheet, PDF (54/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Exception Vector Table and Memory Indirect Branch Addresses: In advanced mode the top area starting at
H'00000000 is allocated to the exception vector table in units of 32 bits. In each 32 bits, the upper 8 bits are ignored and a
branch address is stored in the lower 24 bits (figure 2-1). For details of the exception vector table, see section 4, Exception
Handling.
H'00000000
H'00000003
H'00000004
H'00000007
H'00000008
Reserved
Power-on reset exception vector
Reserved
Manual reset exception vector*
H'0000000B
H'0000000C
(Reserved for system use)
Exception vector table
H'00000010
Reserved
Exception vector 1
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Figure 2-1 Exception Vector Table (Advanced Mode)
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions uses an 8-bit absolute
address included in the instruction code to specify a memory operand that contains a branch address. In advanced mode
the operand is a 32-bit longword operand, providing a 32-bit branch address. The upper 8 bits of these 32 bits are a
reserved area that is regarded as H'00. Branch addresses can be stored in the area from H'00000000 to H'000000FF. Note
that the first part of this range is also the exception vector table.
Rev.6.00 Oct.28.2004 page 24 of 1016
REJ09B0138-0600H