HD64F2357VF13 Datasheet, PDF (492/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

13.3.4 Timing of Setting of Watchdog Timer Overflow Flag (WOVF)
The WOVF flag is set to 1 if TCNT overflows during watchdog timer operation. At the same time, the WDTOVF signal*
goes low. If TCNT overflows while the RSTE bit in RSTCSR is set to 1, an internal reset signal is generated for the entire
H8S/2357 Group chip. Figure 13-7 shows the timing in this case.
Note: * The WDTOVF pin function is not available in the F-ZTAT version, the H8S/2398, H8S/2394, H8S/2392, or
H8S/2390.
ø
TCNT
H'FF
H'00
Overflow signal
(internal signal)
WOVF
WDTOVF signal*
132 states
Internal reset
signal
518 states
Note: * The WDTOVF pin function is not available in the F-ZTAT version, the H8S/2398, H8S/2394, H8S/2392,
or H8S/2390.
Figure 13-7 Timing of Setting of WOVF
13.4 Interrupts
During interval timer mode operation, an overflow generates an interval timer interrupt (WOVI). The interval timer
interrupt is requested whenever the OVF flag is set to 1 in TCSR.
Rev.6.00 Oct.28.2004 page 462 of 1016
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