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HD64F2357VF13 Datasheet, PDF (231/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
7.5.4 Repeat Mode
Repeat mode can be specified by setting the RPE bit in DMACR to 1, and clearing the DTIE bit to 0. In repeat mode,
MAR is updated after each byte or word transfer in response to a single transfer request, and this is executed the number
of times specified in ETCR. On completion of the specified number of transfers, MAR and ETCRL are automatically
restored to their original settings and operation continues.
One address is specified by MAR, and the other by IOAR. The transfer direction can be specified by the DTDIR bit in
DMACR.
Table 7-8 summarizes register functions in repeat mode.
Table 7-8 Register Functions in Repeat Mode
Function
Register
DTDIR = 0 DTDIR = 1 Initial Setting
Operation
23
MAR
0 Source
address
register
Destination Start address of
address transfer destination
register or transfer source
Incremented/
decremented every
transfer. Initial
setting is restored
when value reaches
H'0000
23
15
H'FF
IOAR
0 Destination Source
address address
register register
Start address of Fixed
transfer source or
transfer destination
7
0 Holds number of
ETCRH transfers
Number of transfers Fixed
Transfer counter
7
0
ETCRL
Legend:
MAR: Memory address register
IOAR: I/O address register
ETCR: Transfer count register
DTDIR:Data transfer direction bit
Number of transfers Decremented every
transfer. Loaded with
ETCRH value when
count reaches H'00
MAR specifies the start address of the transfer source or transfer destination as 24 bits. MAR is incremented or
decremented by 1 or 2 each time a byte or word is transferred.
IOAR specifies the lower 16 bits of the other address. The 8 bits above IOAR have a value of H'FF.
The number of transfers is specified as 8 bits by ETCRH and ETCRL. The maximum number of transfers, when H'00 is
set in both ETCRH and ETCRL, is 256.
In repeat mode, ETCRL functions as the transfer counter, and ETCRH is used to hold the number of transfers. ETCRL is
decremented by 1 each time a transfer is executed, and when its value reaches H'00, it is loaded with the value in ETCRH.
At the same time, the value set in MAR is restored in accordance with the values of the DTSZ and DTID bits in DMACR.
The MAR restoration operation is as shown below.
MAR = MAR – (–1)DTID · 2DTSZ · ETCRH
Rev.6.00 Oct.28.2004 page 201 of 1016
REJ09B0138-0600H