HD64F2357VF13 Datasheet, PDF (188/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

6.9 Write Data Buffer Function
The H8S/2357 Group has a write data buffer function in the external data bus. Using the write data buffer function enables
external writes and DMA single address mode transfers to be executed in parallel with internal accesses. The write data
buffer function is made available by setting the WDBE bit in BCRL to 1.
Figure 6-36 shows an example of the timing when the write data buffer function is used. When this function is used, if an
external write or DMA single address mode transfer continues for 2 states or longer, and there is an internal access next,
only an external write is executed in the first state, but from the next state onward an internal access (on-chip memory or
internal I/O register read/write) is executed in parallel with the external write rather than waiting until it ends.
On-chip memory read Internal I/O register read
External write cycle
T₁
T₂
T_W
T_W
T₃
Internal address bus
Internal read signal
Internal memory Internal I/O register address
A₂₃ to A₀
External
space
write
CSn
HWR, LWR
D₁₅ to D₀
External address
Note : n = 0 to 7
Figure 6-36 Example of Timing when Write Data Buffer Function is Used
Rev.6.00 Oct.28.2004 page 158 of 1016
REJ09B0138-0600H