HD64F2357VF13 Datasheet, PDF (343/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

9.10.2 Register Configuration (On-Chip ROM Version Only)
Table 9-17 shows the port C register configuration.
Table 9-17 Port C Registers
Name
Abbreviation R/W
Port C data direction register
PCDDR
W
Port C data register
PCDR
R/W
Port C register
PORTC
R
Port C MOS pull-up control register PCPCR
R/W
Note: * Lower 16 bits of the address.
Initial Value
H'00
H'00
Undefined
H'00
Address *
H'FEBB
H'FF6B
H'FF5B
H'FF72
Port C Data Direction Register (PCDDR) (On-Chip ROM Version Only)
Bit
:
7
6
5
4
3
2
1
0
PC7DDR PC6DDR PC5DDR PC4DDR PC3DDR PC2DDR PC1DDR PC0DDR
Initial value :
0
0
0
0
0
0
0
0
R/W
:W
W
W
W
W
W
W
W
PCDDR is an 8-bit write-only register, the individual bits of which specify input or output for the pins of port C. PCDDR
cannot be read; if it is, an undefined value will be read.
PCDDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode. The OPE bit in SBYCR is used to select whether the address output pins retain their
output state or become high-impedance when a transition is made to software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
• Mode 7
Setting a PCDDR bit to 1 makes the corresponding port C pin an output port, while clearing the bit to 0 makes the pin
an input port.
• Mode 6
Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while clearing the bit to 0 makes the
pin an input port.
• Modes 4 and 5
The corresponding port C pins are address outputs irrespective of the value of the PCDDR bits.
Port C Data Register (PCDR) (On-Chip ROM Version Only)
Bit
:
Initial value :
R/W
:
7
PC7DR
0
R/W
6
PC6DR
0
R/W
5
PC5DR
0
R/W
4
PC4DR
0
R/W
3
PC3DR
0
R/W
2
PC2DR
0
R/W
1
PC1DR
0
R/W
0
PC0DR
0
R/W
PCDR is an 8-bit readable/writable register that stores output data for the port C pins (PC₇ to PC₀).
PCDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode.
Rev.6.00 Oct.28.2004 page 313 of 1016
REJ09B0138-0600H