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HD64F2357VF13 Datasheet, PDF (364/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
Port G Register (PORTG)
Bit
:
7
6
5
—
—
—
Initial value : Undefined Undefined Undefined
R/W
:—
—
—
4
PG4
—*
R
Note: * Determined by state of pins PG4 to PG0.
3
PG3
—*
R
2
PG2
—*
R
1
PG1
—*
R
0
PG0
—*
R
PORTG is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of output data for the port
G pins (PG4 to PG0) must always be performed on PGDR.
Bits 7 to 5 are reserved; they return an undetermined value if read, and cannot be modified.
If a port G read is performed while PGDDR bits are set to 1, the PGDR values are read. If a port G read is performed
while PGDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTG contents are determined by the pin states, as PGDDR and
PGDR are initialized. PORTG retains its prior state after a manual reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Rev.6.00 Oct.28.2004 page 334 of 1016
REJ09B0138-0600H