HD64F2357VF13 Datasheet, PDF (864/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

A.6 Condition Code Modification
This section indicates the effect of each CPU instruction on the condition code. The notation used in the table is defined
below.
m = 31 for longword operands
15 for word operands
7 for byte operands
Si
The i-th bit of the source operand
Di The i-th bit of the destination operand
Ri
The i-th bit of the result
Dn The specified bit in the destination operand
— Not affected
Modified according to the result of the instruction (see definition)
0
Always cleared to 0
1
Always set to 1
*
Undetermined (no guaranteed value)
Z'
Z flag before instruction execution
C'
C flag before instruction execution
Rev.6.00 Oct.28.2004 page 834 of 1016
REJ09B0138-0600H