HD64F2357VF13 Datasheet, PDF (221/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 0.
Bit 3—Write Enable 1B (WE1B): Enables or disables writes to all bits in DMACR1B, bits 11, 7, and 3 in DMABCR,
and bit 5 in DMATCR by the DTC.
Bit 3
WE1B
0
1
Description
Writes to all bits in DMACR1B, bits 11, 7, and 3 in DMABCR, and bit 5 in DMATCR
are disabled
(Initial value)
Writes to all bits in DMACR1B, bits 11, 7, and 3 in DMABCR, and bit 5 in DMATCR
are enabled
Bit 2—Write Enable 1A (WE1A): Enables or disables writes to all bits in DMACR1A, and bits 10, 6, and 2 in
DMABCR by the DTC.
Bit 2
WE1A
0
1
Description
Writes to all bits in DMACR1A, and bits 10, 6, and 2 in DMABCR are disabled
(Initial value)
Writes to all bits in DMACR1A, and bits 10, 6, and 2 in DMABCR are enabled
Bit 1—Write Enable 0B (WE0B): Enables or disables writes to all bits in DMACR0B, bits 9, 5, and 1 in DMABCR, and
bit 4 in DMATCR.
Bit 1
WE0B
0
1
Description
Writes to all bits in DMACR0B, bits 9, 5, and 1 in DMABCR, and bit 4 in DMATCR
are disabled
(Initial value)
Writes to all bits in DMACR0B, bits 9, 5, and 1 in DMABCR, and bit 4 in DMATCR
are enabled
Bit 0—Write Enable 0A (WE0A): Enables or disables writes to all bits in DMACR0A, and bits 8, 4, and 0 in DMABCR.
Bit 0
WE0A
0
1
Description
Writes to all bits in DMACR0A, and bits 8, 4, and 0 in DMABCR are disabled
(Initial value)
Writes to all bits in DMACR0A, and bits 8, 4, and 0 in DMABCR are enabled
Writes by the DTC to bits 15 to 12 (FAE and SAE) in DMABCR are invalid regardless of the DMAWER settings. These
bits should be changed, if necessary, by CPU processing.
In writes by the DTC to bits 7 to 4 (DTE) in DMABCR, 1 can be written without first reading 0. To reactivate a channel
set to full address mode, write 1 to both Write Enable A and Write Enable B for the channel to be reactivated.
MAR, IOAR, and ETCR are always write-enabled regardless of the DMAWER settings. When modifying these registers,
the channel for which the modification is to be made should be halted.
Rev.6.00 Oct.28.2004 page 191 of 1016
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