HD64F2357VF13 Datasheet, PDF (872/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Address Register
(low) Name Bit 7
H’FF06 DMABCRH FAE1
Bit 6
FAE0
Bit 5
SAE1
Bit 4
SAE0
Bit 3 Bit 2 Bit 1 Bit 0
DTA1B DTA1A DTA0B DTA0A
FAE1 FAE0 —
—
DTA1 —
DTA0 —
H’FF07 DMABCRL DTE1B DTE1A DTE0B DTE0A DTIE1B DTIE1A DTIE0B DTIE0A
DTME1 DTE1 DTME0 DTE0 DTIE1B DTIE1A DTIE0B DTIE0A
Module Name
Short
address mode
Full
address mode
Short
address mode
Full
address mode
Data Bus
Width
16 bits
H’FF2C
H’FF2D
ISCRH
ISCRL
IRQ7SCB IRQ7SCA IRQ6SCB IRQ6SCA IRQ5SCB IRQ5SCA IRQ4SCB IRQ4SCA
IRQ3SCB IRQ3SCA IRQ2SCB IRQ2SCA IRQ1SCB IRQ1SCA IRQ0SCB IRQ0SCA
Interrupt
controller
8 bits
H’FF2E IER
IRQ7E IRQ6E IRQ5E IRQ4E IRQ3E IRQ2E IRQ1E IRQ0E
H’FF2F ISR
IRQ7F IRQ6F IRQ5F IRQ4F IRQ3F IRQ2F IRQ1F IRQ0F
H’FF30 to DTCER DTCE7 DTCE6 DTCE5 DTCE4 DTCE3 DTCE2 DTCE1 DTCE0 DTC
H’FF35
8 bits
H’FF37 DTVECR SWDTE DTVEC6 DTVEC5 DTVEC4 DTVEC3 DTVEC2 DTVEC1 DTVEC0
H’FF38 SBYCR SSBY STS2 STS1 STS0 OPE —
—
—
Power-down
mode
8 bits
H’FF39 SYSCR —
—
INTM1 INTM0 NMIEG —
—
RAME MCU
8 bits
H’FF3A SCKCR PSTOP —
—
—
—
SCK2 SCK1 SCK0 Clock pulse
8 bits
generator
H’FF3B MDCR —
—
—
—
—
MDS2 MDS1 MDS0 MCU
8 bits
H’FF3C MSTPCRH MSTP15 MSTP14 MSTP13 MSTP12 MSTP11 MSTP10 MSTP9 MSTP8
H’FF3D MSTPCRL MSTP7 MSTP6 MSTP5 MSTP4 MSTP3 MSTP2 MSTP1 MSTP0
Power-down
mode
8 bits
H’FF42 SYSCR2 —
—
—
—
FLSHE —
—
—
*^ç *⁸
MCU
8 bits
H’FF44 Reserved —
—
—
—
—
—
—
—
Reserved
—
H’FF45 Reserved —
—
—
—
—
—
—
—
Reserved
—
H’FF46 PCR G3CMS1 G3CMS0 G2CMS1 G2CMS0 G1CMS1 G1CMS0 G0CMS1 G0CMS0 PPG
8 bits
H’FF47 PMR G3INV G2INV G1INV G0INV G3NOV G2NOV G1NOV G0NOV
H’FF48 NDERH NDER15 NDER14 NDER13 NDER12 NDER11 NDER10 NDER9 NDER8
H’FF49 NDERL NDER7 NDER6 NDER5 NDER4 NDER3 NDER2 NDER1 NDER0
H’FF4A PODRH POD15 POD14 POD13 POD12 POD11 POD10 POD9 POD8
H’FF4B PODRL POD7 POD6 POD5 POD4 POD3 POD2 POD1 POD0
H’FF4C*³ NDRH NDR15 NDR14 NDR13 NDR12 NDR11 NDR10 NDR9 NDR8
H’FF4D*³ NDRL NDR7 NDR6 NDR5 NDR4 NDR3 NDR2 NDR1 NDR0
H’FF4E*³ NDRH —
—
—
—
NDR11 NDR10 NDR9 NDR8
H’FF4F*³ NDRL —
—
—
—
NDR3 NDR2 NDR1 NDR0
H’FF50 PORT1 P17 P16 P15 P14 P13 P12 P11 P10
Port
8 bits
H’FF51 PORT2 P27 P26 P25 P24 P23 P22 P21 P20
H’FF52 PORT3 —
—
P35 P34 P33 P32 P31 P30
H’FF53 PORT4 P47 P46 P45 P44 P43 P42 P41 P40
H’FF54 PORT5 —
—
—
—
P53 P52 P51 P50
H’FF55 PORT6 P67 P66 P65 P64 P63 P62 P61 P60
H’FF59 PORTA PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
H’FF5A PORTB*² PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
H’FF5B PORTC*² PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
H’FF5C PORTD*² PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
H’FF5D PORTE PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
Rev.6.00 Oct.28.2004 page 842 of 1016
REJ09B0138-0600H