HD64F2357VF13 Datasheet, PDF (46/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Type
Symbol
Operating mode MD₂ to
control
MD₀
System control RES
STBY
BREQ
BREQO
BACK
FWE*²
Interrupts
NMI
IRQ7 to
IRQ0
Pin No.
TFP-120 FP-128B I/O
Name and Function
115 to
113
125 to
123
Input
Mode pins: These pins set the
operating mode.
The relation between the settings of
pins MD₂ to MD₀ and the operating
mode is shown below. These pins
should not be changed while the
H8S/2357 Group is operating.
Operating
MD₂ MD₁ MD₀ Mode
0
0
0
—
1
—
1
0
—
1
—
1
0
0
Mode 4*
1
Mode 5*
1
0
Mode 6
1
Mode 7
Note: * In ROMless version, only
modes 4 and 5 are available.
73
81
Input Reset input: When this pin is driven
low, the chip is reset. The type of
reset can be selected according to
the NMI input level. At power-on, the
NMI pin input level should be set
high.
75
83
Input Standby: When this pin is driven low,
a transition is made to hardware
standby mode.
88
96
Input Bus request: Used by an external
bus master to issue a bus request to
the H8S/2357 Group.
86
94
Output Bus request output: The external
bus request signal used when an
internal bus master accesses
external space in the external bus-
released state.
87
95
Output Bus request acknowledge:
Indicates that the bus has been
released to an external bus master.
72
80
Input Flash write enable:
Enables/disables flash memory
programming.
74
82
Input Nonmaskable interrupt: Requests a
nonmaskable interrupt. When this pin
is not used, it should be fixed high.
32 to 29, 38, 37,
28 to 25 34, 33,
32 to 29
Input
Interrupt request 7 to 0: These pins
request a maskable interrupt.
Rev.6.00 Oct.28.2004 page 16 of 1016
REJ09B0138-0600H