HD64F2357VF13 Datasheet, PDF (622/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

• If the mode pin input levels are changed (for example, from low to high) during a reset, the state of ports with
multiplexed address functions and bus control output pins (AS, RD, HWR) will change according to the change in the
microcomputer’s operating mode*³.
Therefore, care must be taken to make pin settings to prevent these pins from becoming output signal pins during a
reset, or to prevent collision with signals outside the microcomputer.
Notes: 1. Mode pins and FWE pin input must satisfy the mode programming setup time (t_MDS = 200 ns) with respect to
the reset release timing, as shown in figures 19-33 to 19-35.
2. For further information on FWE application and disconnection, see section 19.14, Flash Memory Programming
and Erasing Precautions.
3. See Appendix D, Pin States.
19.8.2 User Program Mode
When set to user program mode, the chip can program and erase its flash memory by executing a user program/erase
control program. Therefore, on-board reprogramming of the on-chip flash memory can be carried out by providing on-
board means of FWE control and supply of programming data, and storing a program/erase control program in part of the
program area as necessary.
To select user program mode, select a mode that enables the on-chip flash memory (mode 6 or 7), and apply a high level
to the FWE pin. In this mode, on-chip supporting modules other than flash memory operate as they normally would in
modes 6 and 7.
The flash memory itself cannot be read while the SWE bit is set to 1 to perform programming or erasing, so the control
program that performs programming and erasing should be run in on-chip RAM or external memory.
Figure 19-18 shows the procedure for executing the program/erase control program when transferred to on-chip RAM.
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