HD64F2357VF13 Datasheet, PDF (581/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

16.6 Usage Notes
The following points should be noted when using the A/D converter.
Setting Range of Analog Power Supply and Other Pins:
(1) Analog input voltage range
The voltage applied to analog input pins AN0 to AN7 during A/D conversion should be in the range AV_SS ≤ ANn ≤
V_ref.
(2) Relation between AV_CC, AV_SS and V_CC, V_SS
As the relationship between AV_CC, AV_SS and V_CC, V_SS, set AV_SS = V_SS. If the A/D converter is not used, the AV_CC and
AV_SS pins must on no account be left open.
(3) V_ref input range
The analog reference voltage input at the V_ref pin set in the range V_ref ≤ AV_CC.
Note:If conditions (1), (2), and (3) above are not met, the reliability of the device may be adversely affected.
Notes on Board Design: In board design, digital circuitry and analog circuitry should be as mutually isolated as possible,
and layout in which digital circuit signal lines and analog circuit signal lines cross or are in close proximity should be
avoided as far as possible. Failure to do so may result in incorrect operation of the analog circuitry due to inductance,
adversely affecting A/D conversion values.
Also, digital circuitry must be isolated from the analog input signals (AN0 to AN7), analog reference power supply (V_ref),
and analog power supply (AV_CC) by the analog ground (AV_SS). Also, the analog ground (AV_SS) should be connected at
one point to a stable digital ground (V_SS) on the board.
Notes on Noise Countermeasures: A protection circuit connected to prevent damage due to an abnormal voltage such as
an excessive surge at the analog input pins (AN0 to AN7) and analog reference power supply (V_ref) should be connected
between AV_CC and AV_SS as shown in figure 16-7.
Also, the bypass capacitors connected to AV_CC and V_ref and the filter capacitor connected to AN0 to AN7 must be
connected to AV_SS.
If a filter capacitor is connected as shown in figure 16-7, the input currents at the analog input pins (AN0 to AN7) are
averaged, and so an error may arise. Also, when A/D conversion is performed frequently, as in scan mode, if the current
charged and discharged by the capacitance of the sample-and-hold circuit in the A/D converter exceeds the current input
via the input impedance (R_in), an error will arise in the analog input pin voltage. Careful consideration is therefore
required when deciding the circuit constants.
Rev.6.00 Oct.28.2004 page 551 of 1016
REJ09B0138-0600H