HD64F2357VF13 Datasheet, PDF (365/1049 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

9.14.3 Pin Functions
Port G pins also function as bus control signal output pins (CS0 to CS3, and CAS). The pin functions are different in mode
7, and modes 4 to 6. Port G pin functions are shown in table 9-26.
Table 9-26 Port G Pin Functions
Pin
PG₄/CS0
PG₃/CS1
PG₂/CS2
PG₁/CS3
PG₀/CAS
Selection Method and Pin Functions
The pin function is switched as shown below according to the operating mode
and bit PG4DDR.
Operating
Mode
Mode 7*
Modes 4 to 6*
PG4DDR
0
1
0
1
Pin function PG₄ input pin PG₄ output pin PG₄ input pin CS0 output pin
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
The pin function is switched as shown below according to the operating mode
and bit PG3DDR.
Operating
Mode
Mode 7*
Modes 4 to 6*
PG3DDR
0
1
0
1
Pin function PG₃ input pin PG₃ output pin PG₃ input pin CS1 output pin
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
The pin function is switched as shown below according to the operating mode
and bit PG2DDR.
Operating
Mode
Mode 7*
Modes 4 to 6*
PG2DDR
0
1
0
1
Pin function PG₂ input pin PG₂ output pin PG₂ input pin CS2 output pin
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
The pin function is switched as shown below according to the operating mode
and bit PG1DDR.
Operating
Mode
Mode 7*
Modes 4 to 6*
PG1DDR
0
1
0
1
Pin function PG₁ input pin PG₁ output pin PG₁ input pin CS3 output pin
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
The pin function is switched as shown below according to the combination of
the operating mode and bits RMTS2 to RMTS0 and PG0DDR.
Operating
Mode
Mode 7*
Modes 4 to 6*
RMTS2 to
—
B'000,
B'001 to
RMTS0
B'100 to B'111
B'011
PG0DDR
0
1
0
1
—
Pin function
PG₀
input
pin
PG₀
output
pin
PG₀
input
pin
PG₀
output
pin
CAS
output
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
Rev.6.00 Oct.28.2004 page 335 of 1016
REJ09B0138-0600H