Z80 Datasheet, PDF (71/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

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Enable
DMA
Request Bus
NO
RDY
Active
?
YES
RDY
NO
Active
?
YES
Request Bus
Transfer/Search One Byte
(See Figure 20)
NO
End
of Block
?
YES
Set Status Flag
Figure 22. Burst Mode
• Interrupt
• Release Bus
• Auto Restart
In the Burst mode (Figure 22), the bus is requested in the same manner as
previously, but when the DMA has control of the bus it continues to transfer
bytes until it encounters either an inactive Ready signal from an I/O port, an
end-of-block, or a byte match as in Figure 20. If the Ready line goes
inactive before end-of-block is reached, the DMA releases the bus to the
CPU and repetitively tests the Ready signal until it comes active again.
Then it requests the bus again and continues its transfers. Because of this,
the Burst mode is often the most useful one for general-purpose applica-
tions. It does not request the bus until it actually can use it, but once it
UM008101-0601
Direct Memory Access