English
Language : 

Z80 Datasheet, PDF (145/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS
< %27 2GTKRJGTCNU
7UGT /CPWCN

completed before the next READ STATUS BYTE or INITIATE READ
SEQUENCE command.
Table 16 illustrates a program to transfer data from memory (Port A) to a
peripheral device (Port B). In this example, the Port A memory starting
address is 1050H and the Port B peripheral fixed address is 05H. The
number of data bytes to be transferred is 1001H bytes (one more than spec-
ified by the block length). The table of DMA commands may be stored in
consecutive memory locations and transferred to the DMA with an output
instruction such as the Z80 CPU’s OTIR instruction.
Table 16. Sample DMA Program
D7
D5
D4
D3
D2 D1 D0
WR0 sets DMA to
receive block length,
Port A starting
address, and
temporarily sets Port
B as source.
Port A address
(lower)
01
1
1
1
0
Block Block Port A Port A B→A
Length Length Upper Upper Tempor
Upper Upper Address Address ary for
Follows Follows Follows Follows Leading
B
Address
01
0
1
0
0
0
Transfer. No
Search
0
0
Port A address
(upper)
00
0
1
0
0
Block length (lower) 0 0
0
0
0
0
Block length (upper) 0 0
0
1
0
0
WR1 defines Port A 0 0
0
1
0
1
as memory with
No Address Address Port is
fixed incrementing
Timing Change Change Memor
address
Follows s
s
y
WR4 defines Port A 0 0
1
0
1
0
as memory with
No Fixed
Port is
fixed incrementing
Timing Address
I/O
address
Follows
0
0
0
0
0
0
0
0
1
0
HEX
50
10
00
10
14
28
UM008101-0601
Direct Memory Access