Z80 Datasheet, PDF (197/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

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The 2-bit mode control register is loaded by the CPU to select the desired
operating mode (byte output, byte input, byte bidirectional bus, or bit
control mode). All data transfer between the peripheral device and the
CPU is achieved through the data input and data output registers. Data
may be written into the output register by the CPU or read back to the
CPU from the input register at any time. The handshake lines associated
with each port are used to control the data transfer between the PIO and
the peripheral device.
+5V GND Φ
CPU
Interface
8
Data Bus
6
PIO Control
Lines
Internal Control
Logic
Internal Bus
Interrupt Control
3
Interrupt Control Lines
Figure 1. PIO Block Diagram
8
Port
Data or Control
A
I/O
Handshake
8
Port
Data or Control
B
I/O
Handshake
Peripheral
Interface
UM008101-0601
Parallel Input/Output