Z80 Datasheet, PDF (140/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

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7. Enable DMA with the ENABLE DMA command.
Interrupts
The interrupt vector (WR4) must be written before interrupts using it can
occur, and interrupts must be enabled with the ENABLE INTERRUPTS
command at initialization or reinitialization. In a Z80 CPU environment,
interrupt service routines after DMA initialization usually include the
following commands at the end of the routine:
1. Interrupt on End-of-Block or Byte Match
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2. ENABLE DMA command
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3. RETI instruction
4. Interrupt on Ready (before requesting the bus)
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UM008101-0601
Direct Memory Access