Z80 Datasheet, PDF (39/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

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where t_c is the period of System clock, P is the prescaler factor of 16 or 256,
and TC is the time constant data word.
Bit 5 = 1. Defined for Timer mode only. Prescaler factor is 256.
Bit 5 = 0. Defined for Timer mode only. Prescaler factor is 16.
Bit 4 = 1. TIMER Mode: positive edge trigger starts timer operation.
COUNTER Mode: positive edge decrements the down-counter.
Bit 4 = 0. TIMER Mode: negative edge trigger starts timer operation.
COUNTER Mode: negative edge decrements the down-counter.
Bit 3 = 1. TIMER Mode only. External trigger is valid for starting timer
operation after rising edge of T2 of the machine cycle following the one
that loads the tune constant. The prescaler is decremented two clock cycles
later if the setup tune is met, otherwise three clock cycles.
Bit 3 = 0. TIMER Mode only. Timer begins operation on the rising edge of
T2 of the machine cycle following the one that loads the time constant.
Bit 2 = 1. The time constant data word for the Time Constant register is the
next word written to this channel. If an updated channel control word and
time constant data word are written to a channel while it, is already in
operation, the down-counter continues decrementing to zero before the new
time constant is loaded.
Bit 2 = 0. No time constant date word for the Time Constant register is to
follow. The channel control word updates the status of a channel already in
operation to channel will not operate without a correctly programmed data
word in the lime Constant register. Bit 2 in the channel control word must
be set in order to write to the Time Constant register.
Bit 1 = 1. Counting and/or timing operation is terminated and the channel is
reset. This is not a stored condition. The bits in the Channel Control register
are unchanged. If bits 1 and 2 are set to 1, the channel resumes operation
upon loading a time constant.
Bit 1 = 0. Channel continues current operation.
UM008101-0601
Counter/Timer Channels