Z80 Datasheet, PDF (41/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

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Service Interrupt Routine
Starting Address
Low Order
High Order
Desired starting address pointed to by:
1 Reg
Contents
7 Bits from
Peripheral
0
Figure 8. Mode 2 Interrupt Operation
Table 7. Interrupt Vector Register
7
6
5
4
3
Supplied by User
R/W
2
1
Channel Identifier
R/W
0
Word
R/W
Bit
Number
7–3
2–1
Field
Reserved
Channel
Identifier
0
Word
R/W Value Description
R/W
Supplied by User
R/W 11 Channel 3
10 Channel 2
01 Channel 1
00 Channel 0
R/W 1 Control
0 Interrupt Vector
UM008101-0601
Counter/Timer Channels