Z80 Datasheet, PDF (250/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

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Receive Character
Parity Error
Receive Overrun Error
Framing Error
End-of-Frame (SDLC)
Special Receive
Condition Interrupt
Interrupt on All
Receive Characters
First Data Character
First Non-Sync Character (SYNC)
Valid Address Byte (SDLC)
Interrupt on
First Character
DCD Transition
CTS Transition
SYNC Transition
Tx Underrun/EOM
Break/Abort Detection
External Status
Interrupt
Receive
Interrupt
Z80-SIO
Interrupt
Buffer Becoming Empty
Transmit Interrupt
Figure 110. Interrupt Structure
ASYNCHRONOUS OPERATION
Overview
To receive or transmit data in the Asynchronous mode, the Z80 SIO must
be initialized with the following parameters: character length, clock rate,
number of stop bits, even or odd parity, interrupt mode, and receiver or
transmitter enable. The parameters are loaded to the appropriate write
UM008101-0601
Serial Input/Output