Z80 Datasheet, PDF (179/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

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CLK
BUSREQ
BAI
DMA Active
DMA Inactive
Figure 66. Bus Release in Byte Mode
The next bus request for the next byte comes after both BUSREQ and BAI
have returned High. In a Z80 environment, BAI returns High one clock
cycle after BUSREQ returns High.
Bus Release on End-of-Block.
When the DMA is programmed to stop on end-of-block in Burst or Contin-
uous modes, an end-of-block causes BUSREQ to go High (inactive) on the
same rising edge of CLK in which the DMA completes the data block
transfer (see Figure 67). The last byte in the block is transferred even if
RDY goes inactive before completion of the last byte operation.
Active
RDY
Inactive
BUSREQ
Current Byte
Operation
DMA
Inactive
Figure 67. Bus Release on End-of-Block (Burst and Continuous Modes)
UM008101-0601
Direct Memory Access