Z80 Datasheet, PDF (285/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

Z80 CPU Peripherals
User Manual
265
Table 9. SDLC Transmit Mode (Continued)
Function
Termination
Typical Program Steps
Redefine Interrupt Modes
Update Modem Control
Outputs
Disable Transmit Mode
Comments
Terminate gracefully
SDLC Receive
Initialization
The system initializes the SDLC Receive mode using polynomial, receive
word length, and more. The flag characters must also be loaded in WR7
and the secondary address field loaded in WR6. The receiver is enabled
only after all the receive parameters have been set. After all this is
completed, the receiver is in the Hunt phase and remains in this phase
until the first flag is received. While in the SDLC mode, the receiver
never re-enters the Hunt phase, unless specifically instructed to do so by
the program. The WR4 parameters must be issued prior to the WR1,
WR3, WR5, WR6, and WR7 parameters.
Under program control, the receiver can enter the Address Search mode. If
the Address Search bit (WR1, D2) is set, a character following the flag
(first non-flag character) is compared to the programmed address in WR6
and the hardwired global address (1111 1111). If the SDLC frame address
field matches either address, data transfer begins.
Because the Z80 SIO is capable of matching only one address character,
extended address field recognition must be done by the CPU. In this
instance, the Z80 SIO transfers the additional address bytes to the CPU as if
they were data characters. If the CPU determines that the frame does not
have the correct address field, it can set the Hunt bit, and the Z80 SIO
suspends reception and searches for a new message headed by a flag.
UM008101-0601
Serial Input/Output