Z80 Datasheet, PDF (260/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

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Synchronous Modes Of Operation
Monosync
In a Receive operation, matching a single sync character (8-bit sync
mode) with the programmed sync character stored in WR7 implies char-
acter synchronization and enables data transfer.
Bisync
Matching two contiguous sync characters (16-bit sync mode) with the
programmed sync characters stored in WR6 and WR7 implies character
synchronization. In both the Monosync and Bisync modes, SYNC is used
as an output, and is active for the part of the receive clock that detects the
sync character.
External Sync
In this mode, character synchronization is established externally. SYNC is
an input that indicates external character synchronization has been
achieved. After the sync pattern is detected, the external logic must wait
for two full Receive Clock cycles to activate the SYNC input. The SYNC
input must be held Low until character synchronization is lost. Character
assembly begins on the rising edge of RxC that precedes the falling edge
of SYNC.
In all cases after a reset, the receiver is in the Hunt phase, during which
the Z80 SIO looks for character synchronization. The hunt can begin only
when the receiver is enabled, and data transfer can begin only when char-
acter synchronization has been achieved. If character synchronization is
lost, the Hunt phase can be re-entered by writing a control word with the
Enter Hunt Phase bit set (WR3, D4). In the Transmit mode, the trans-
mitter always sends the programmed number of sync bits (8 or 16). In the
UM008101-0601
Serial Input/Output