Z80 Datasheet, PDF (292/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

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PROGRAMMING
Overview
To program the Z80 SIO, the system program first issues a series of
commands that initialize the basic mode of operation and then other
commands that qualify conditions within the selected mode. For example,
the Asynchronous mode, character length, clock rate, number of stop bits,
even or odd parity are first set, then the interrupt mode and, finally, receiver
or transmitter enable. The WR4 parameters must be issued before any other
parameters are issued in the initialization routine.
Both channels contain command registers that must be programmed via the
system program prior to operation.
The Channel Select input (B/A) and the Control/Data input (C/D) are the
command structure addressing controls, and are normally controlled by the
CPU address bus (see Table 11). Figures 114 through 117 illustrate the
timing relationships for programming the write registers, and transferring
data and status.
Table 11. Channel Select Functions
C/D
B/A
Function
0
0
Channel A Data
0
1
Channel B Data
1
0
Channel A Commands/Status
1
1
Channel B Commands/Status
Write Registers
The Z80 SIO contains eight registers (WR7-WR0) in each channel that are
programmed separately by the system program to configure the functional
UM008101-0601
Serial Input/Output