Z80 Datasheet, PDF (325/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

Z80 CPU Peripherals
User Manual
305
TIMING
Read Cycle
The timing signals that are generated by a Z80 CPU input instruction,
which read a Data or Status byte from the Z80 SIO, are illustrated in
Figure 128.
T₁
T₂
T_W
T₃
T₁
Φ
CE
Channel Address
IORQ
RD
M1
Data
Out
Figure 128. Read Cycle Timing
Write Cycle
Figure 129 illustrates the timing and data signals generated by a
Z80 CPU output instruction, which write a Data or Control byte
to the Z80 SIO.
UM008101-0601
Serial Input/Output